Hardware Design of GPS System

　　Satellite IF data is the premise of software receiver research. In order to achieve the design requirements, not only the real-time and high efficiency of the device should be considered, but also the scalability of the system [3]. RF front-end module converts satellite signal into intermediate frequency, uses Field Programmable Gate Array (FPGA), which is widely used in high-speed digital signal processing, as the system control center, to process digital intermediate frequency signal, realize data format conversion, data cache and USB status control, configure USB endpoint, write firmware program and PC software design, and then realize rapid data transmission and PC storage through USB interface, Build hardware platform to realize data acquisition of GPS L1 and BD B1 signals

　　The antenna is responsible for the reception of GPS BD satellite signals. The RF front-end amplifies, filters, downconverts and outputs the received satellite signals after converting them into IF signals; FPGA chip realizes the control of RF front-end MAX2769 and the reception and processing of IF signal, converts the data format and sends it to USB chip endpoint FIFO buffer to form a master-slave FIFO structure and realize high-speed data transmission between CYUSB3014, and then transmits the data through USB3.0 interface and completes the collection and storage on the PC.

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The GPS system consists of three parts