GPS system verification

　　The default collected GPS L1 signal is down converted to 3.996 MHz analog IF signal through RF front-end. The central frequency point of BD B1 IF is 3.996875 MHz. It is sampled to 2 bit digital IF signal through A D, and the sampling clock is 16.369 MHz. The frequency conversion range of MAX2769 chip is 1550~1610 MHz. In order to verify whether the RF front-end module can correctly collect satellite signals and process them, Figure 4 below shows the physical connection diagram of the RF development board, and the oscilloscope shows the clock signal spectrum output after configuring MAX2769.

　　The shielding cover of the RF module can effectively reduce the interference of the external environment to the RF signal and ensure the stable operation of the receiver. The satellite IF data is sent to the signal processing part. The HG-USB30-A development board with USB3.0 interface is used for FPGA data acquisition, control and development.

　　In order to verify whether the designed GPS BD dual mode single channel IF signal acquisition system works correctly, an experimental environment is built. The acquisition system is used outdoors for satellite signal acquisition. The received satellite IF data is saved to the hard disk through the upper computer software, and the data is viewed with a hexadecimal text processor.

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There are three parts to the GPS plan